| |
|
|
|
|
|
Programming for Rational Exec Contents Introduction
- Getting Started
- Board Support Packages (BSP's)
- Kernel Configuration
- Linking and Executing
- Object File Formats
- Debugging
- Multiple Target and Minimal Disturbance Debugger Features
- Target Processor CPU Usage Models
- Interrupt Handling
- Writing Interrupt Handlers
Getting Started
- Create a Working View for Your Application
- Compile and Link Your Application
- Target Control
- Download TDM.
- Download the Kernel.
- Debug your Application
Linking and Executing Programs
- Linking and Executing - A Quick Overview
- Downloading and Executing a Program
- Linking in Detail
- Linking Foreign Object Files
- Selective Linking
- The Linker Options File
- The Linker Description File
- ROM Model
- Reading the Link Map
Linking a C++ Program with an Ada Program
- Importing C++ Functions
Object File Formats (VOX)
- VOX Relocatable Object File Format
- File Header
- Sections
- Section Tables
- PDR Record Table (MIPS and PowerPC targets only)
- Symbol Table
- Relocation and Linking
- VOX Executable Object File Format
- File Header
- Group Table
- Loading
- VOX Object Archive File Format
- Archive Identification String
- File Header
- Archive Library Directory
- Object File Library
Implementing Input/Output Channels for Ada.Text_Io
- Introduction
- Design Overview
- Frequently Asked Questions
Multiple User Programs
- Linking
- Loading
- Debugging
- Starting, Exiting and Terminating
- Sharing Objects Between Programs
- Calling Procedures In Other Programs
- Server Program
Debugging
- Commands
- Loading a program
- Attaching to a Pre-loaded Target
- Passing Commands to the Target Controlling Agent
Multiple Target and Minimal Disturbance Debugger Features
- Multiple Target Debugging
- Program File Option
- Program File
- Synchronized Target Hardware
- Minimal Disturbance Debugging (Realtime Mode)
- Usage
- Permitted/Not Permitted Debugger Commands
- Configuration for Minimal Disturbance
- Realtime Passthru Command
- Detach the Running Application
- Realtime Debugging Considerations
- Runtime Support Configuration
- Programmatic interface to the Real-time Debug Task
- Troubleshooting
- Start-up Time
- RDT Initialization Time-out Error Message
- Runtime Support Configuration
Target Control
- Overview of Target Control Concepts
- Identifying Targets
- Physical Targets
- Logical Targets
- Mapping A Logical Target to A Physical Target
- Multiple Targets in a Single Apex Session
- Simplification of User Interface
- Customizable Features
- GUI Interface
- Tools > Targets
- File > New > New Physical Target
- Shell Interface
- Customization Options
- Steps for Customizing Target Control
- Control of Physical Target Files
Target Processor CPU Usage Models
- PowerPC CPU Usage Model
- Register Conventions
- Machine State Register (MSR) Usage
- Software Floating Point
- Software Floating Point Parameter Passing Conventions
- AltiVec Usage
- MIPS I CPU Usage Model
- MIPS II/III/IV/64 CPU Usage Model
- General Machine Code Precautions
- Accessing Memory Mapped I/O
- Improving Caching Performance - MIPS I Family
- Improving Caching Performance - MIPS II/III/IV/64 Family
- Honeywell RH32 CPU Usage Model
- Memory Management Support
- General Machine Code Precautions
- Mapped I/O
- M68000 CPU Usage Model
- Register Conventions
- Parameter Passing
- Interrupt Stack Switching and Processor States
- i386 Family CPU Usage Model
Interrupt Handling
- Exception and Interrupt Processing on the PowerPC
- PowerPC Exceptions and Interrupts
- PowerPC Exception and Interrupt Processing
- PowerPC Interrupt_Vector_Table
- PowerPC Chaining ISR Routines
- PowerPC Completing the Interrupt Servicing
- PowerPC Context Record
- V_Exception_Name Handlers
- Sharing the Exception Vector Table with TDM
- Kernel Calls - V_Exception_Decode_System_Call
- V_Level1_Program: Program Exceptions:
- V_Level1_Normal: Processing Execution Exceptions
- V_Decode_External: Decoding External Interrupts
- V_Complete_External: Reset External Interrupt Hardware
- Default_Trap
- The Kernel's Enter_From_User Handler
- Floating Point Exception Handling
- General Machine Code Precautions
- Exception, Interrupt, and Trap Processing on the MIPS
- Definitions for Exceptions, Interrupts and Traps
- Interrupt Support
- Floating Point Trap Handlers
- Machine Exception Handling
- Machine Code Precautions: Stack Alignment
- Interrupt Vector Table (IVT)
- Apex Interrupt Handlers
- Interrupt Support on the RH32
- Overview
- Floating Point Trap Handlers
- Machine Exception Handling
- Machine Code Precautions: Stack Alignment
- Arithmetic Overflow Exception
- Interrupt Processing on the M68000 Family
- Interrupt Processing on the i386 Family
Writing Interrupt Handlers
- Ada 95 Protected Procedure Interrupt Handlers
- Introduction
- Overview
- Runtime Environment for Interrupt Handling
- Ada Priority Ceiling
- Protected Object Environment for Interrupt Handling
- User Configuration
- Ada Interrupt Handler Example
- Task Interrupt Entries as Interrupt Handlers
- Interrupt Entry Details (Signal ISR)
- Example Contrasting an Ada Interrupt Entry with an ISR
- Classic Runtime System Interrupt Service Routines (ISR)s
- Functional Overview of an ISR
- ISR Generic Wrappers
- Calling VADS Exec Functions from an ISR
- Interrupt Latency Times
- Pending_Ring_Add
- Enter_From_User
- Restore_Context
- Isr_Complete
- Program Deadlock
- Writing Interrupt Handlers for PowerPC
- ISR Generic Wrappers on PowerPC
- Requirements of an ISR on the PowerPC
- Interrupt Stack Switching
- Installing an ISR in the Interrupt Vector Table (PowerPC)
- Writing Interrupt Handlers for MIPS
- ISR Generic Wrappers on MIPS
- Requirements of an ISR on MIPS
- ISRs and the MIPS Interrupt Mask
- Interrupt Stack Switching
- Installing an ISR in the Interrupt Vector Table
- Writing Interrupt Handlers for RH32
- ISR Generic Wrappers on RH32
- Requirements of an ISR on RH32
- ISRs and the RH32 Interrupt Mask
- Interrupt Stack Switching
- Installing an ISR in the Interrupt Vector Table
- Writing Interrupt Handlers for M68000 Family
- ISR Generic Wrappers on M68000 Family
- Requirements and Layout of an ISR on M68000 Family
- ISRs and M68000 Family Interrupt Levels
- Writing Interrupt Handlers for i386
- ISR Generic Wrappers on i386 Family
- Requirements and Layout of an ISR on i386 Family
- ISRs and Board-specific Interrupt Priority Levels
- Installing an ISR in the Interrupt Descriptor Table
Programming for Rational Exec Index
| Rational Software Corporation http://www.rational.com support@rational.com techpubs@rational.com Copyright © 1993-2002, Rational Software Corporation. All rights reserved. |
| |
|
|
|
|
|
 |
 |