A - B - C - D - E - F - G - H - I - J - K - L - M - N - O - P - Q - R - S - T - U - V - W - X - Y - Z

Programming for Rational Exec Index

A

absolute symbol

linker options declaration 18

access

memory mapped I/O

MIPS 231

Ada interrupt entries

defined 209

Ada I/O 55

Ada priority ceiling

interrupt handling 202

Ada program

linking with C++ 37

Ada.Text_Io 55

Address_Error_Handler

MIPS kernel 193

align

linker options keyword 16

alignment

default for group declarations in linker 24

allocate

lowest address to group 20

AltiVec programming 121

AltiVec Register Set 124

AltiVec usage 120

a.out object file format 39

APEX_RDT_TIMEOUT

increase value in minimal disturbance debugging 98

application

compile 7

create working view 5

application code

definition 154

application ISRs

RH32 196

Arithmetic Overflow Exception

RH32 195

at

linker options keyword 16

Attach_Isr

i386 243

M68k 236, 243

MIPS 186

overview 210

PowerPC 166, 226

RH32 195

B

Bus_Error_Handler

MIPS 193

byte ordering

MIPS I 127

MIPS II 131

PowerPC 119

RH32 147

C

c0_status

MIPS I 128

MIPS II 132

cache

collision avoidance on MIPS I 142

collision avoidance on MIPS II 145

collisions on MIPS I 142

collisions on MIPS II 145

data cache collision avoidance on MIPS I 144

data cache collision avoidance on MIPS II 147

improve performance on MIPS II 144

overview on MIPS I 142

overview on MIPS II 144

performance on MIPS I 141

structure on MIPS I 142

structure on MIPS II 144

call

functions from an ISR 214

procedures in other programs 68

catch exceptions

multiple target debugging 92

chaining ISR routines

PowerPC 174

commands

pass 86

passthru in minimal disturbance debugging 98

premitted/not permitted in minimal disturbance debugging 95

compile

getting started 7

Complete_External

complete interrupt servicing

PowerPC 174

Complete_Isr

i386 248

configuration

minimal disturbance debugging 97

user configuration for interrupt processing 203

configure

MIPS II

Implicit_Code(OFF) 140

MIPS kernel

collision avoidance 144

user interrupt handling 203

Const

VOX relocatable object file sections 43

context record

PowerPC 175

CP0

status register on MIPS I 128

status register on MIPS II 132

CPU usage model

i386 158, 159

interrupt support

MIPS I 185

MIPS I 126

MIPS II 131

PowerPC 117

RH32 147

CR0

i386 CPU registers 160

Create_Signal

interrupt entries 210

critical regions

interrupt latency 222

critical regions protected

M68K 242

customization

target control 110

D

Data

VOX relocatable object file sections 43

Data relocation

VOX relocatable object file sections 43

Data_Group

place into ROM 25

debug

minimal disturbance 89

debug registers

i386 161

Debug_Block

i386 246

special entry point for Enter_Isr 246

debugging

multiple user programs 64

debugging AltiVec 125

declaration

group 21

objects 21

decoding external interrupts

PowerPC 180

default

alignment for group declarations in linker 24

Default_Trap

PowerPC 181

define

absolute symbol 18

linker options keyword 18

symbol prior to linking 18

definition

application code 154

exception

i386 196

general exception vector

MIPS I 185

internal exception 196

interrupt 196

interrupt handler 196

interrupt latencyM68k 242

traps

MIPS II 183

Deleted Sections

link map 29

detach

minimal disturbance debugging 99

disable

interrupt latency 222

interrupts

i386 247, 248

M68k 242

MIPS 229

PowerPC 176

RH32 234

Disable_Intr_Priority

i386 249

M68k 242

Disable_Mask

MIPS 230

RH32 234

disassembly

minimal disturbance debugging 100

display data

minimal disturbance debugging 100

Div_By_Zero_Handler

MIPS 192

download

embedded program 11

E

EFLAGS

i386 registers and data structures 160

enable

floating point accelerator

MIPS II 186

FPC

MIPS II 186

end

linker options keyword 16

Enter_From_User

interrupt latency 222

MIPS 191

PowerPC 181

Enter_Isr

switch stack

M68k 155

entry

linker options keyword 19

entry point

executable 19

environment variables

minimal disturbance debugging 94

example

linker description file 27

options file for placing program into ROM 27

signal ISR 210

exception

definition

M68k 196

MIPS II 182

exception group 24

exception handling

floating point

PowerPC 182

machine

MIPS I 187

PowerPC 182

RH32 195

MIPS 185

exception processing

PowerPC 166

exception tables

compacted 24

Exception Vector Table

install ISR

M68k 243

sharing with TDM on PowerPC 177

EXCEPTION_GROUP 24

exceptions

floating point

PowerPC 182

i386

definition 197

processing 197

minimal disturbance debugging 99

PowerPC definition 164

executable

entry point 19

executable file

groups 21

execute

compiled program 11

linking and executing overview 11

execution exceptions processing

PowerPC 180

exiting

multiple user programs 65

external interrupts

reset

PowerPC 181

external interrupts processing

PowerPC 179

F

Fast_Isr 214

caution 214

steps performed 237

MIPS 228

VADSexec wrapper 214

files

linker description file 15

names in linker description file 17

VOX executable object file format 49

VOX file layout illustration 49

VOX object archive files 51

VOX object file formats 39

VOX relocatable object file formats 39

Float_Wrapper 214

save/restore state of floating point hardware 214

VADSexec wrapper 214

floating point

PowerPC software parameter passing 120

software floating point on PowerPC 119

trap handlers on RH32 150

floating point accelerator

enable

MIPS II 186

MIPS II 132

floating point coprocessor

save and restore registers 214

See also FPC

floating point exceptions

PowerPC 182

floating point trap handlers

MIPS 186

floating point unit

PowerPC 119

for

linker options keyword 16

for clauses

linker desciption file 24

for use at

linker options file 16

foreign object files

link 13

format

linker description file 16

VOX executable object file 49

VOX object archive files 51

VOX relocatable object files 39

Fp_Exception_Handler

MIPS 193

Fp_Restore_Handler

MIPS 191

Fp_Save_Init_Handler

MIPS 191

Fp_Unusable_Handler

MIPS 193

FPC

enable

MIPS II 186

MIPS I support 127

MIPS II 132

RH32 148

FPops

MIPS II 187

frame pointer 238, 245

odd 238, 245

reset 240

functional overview of an ISR 212

G

GDT entries

i386 161

general exception vector

MIPS I 185

generate

symbol map 20

getting started

compile application 7

create working view 5

debug application 10

run application 10

gofast.var

software floating point 119

group

linker options keyword 16

group declaration 21

identify section of an object file 22

specify library unit 22

group images

VOX executable object files 50

group table

VOX executable object files 50

groups

in executable file 21

H

handler_table

runtime environment for interrupt handling 202

hardware interrupt processing

PowerPC 182

hardware stack registers

M68k 153

header

VOX executable object file format 49

VOX relocatable object files 39

high priority ISR 242, 249

I

i386

CPU usage model 158, 159

i386 exception 196

IDT

i386 162

interrupt handlers installed 249

image

linker options keyword 16

image groups

linker description file 23

Implicit_Code(OFF)

MIPS II machine code 140

RH32 150

importing 37

importing C++ functions

C++ functions 37

include

additional object files in link 21

linker options keyword 19

subsection in executable 19

Include option

selective linking 14

initialize

CPU on RH32 148

FPC

MIPS 191

i386 kernel 159

kernel

MIPS I 127

MIPS II 132

install

ISR in Exception Vector Table 243

ISR in Interrupt Descriptor Table

i386 249

ISR in Interrupt Vector Table

MIPS 231

PowerPC 226

RH32 235

internal exception

definition 196

interrupt

levels 241

nesting

M68k 238

off time 222

share between multiple devices

MIPS 189

signal entry 209

stack switching

MIPS 230

interrupt depth 242

counter 237

increment before call to Complete_Isr 240

incremented by Enter_Isr 238

Interrupt Descriptor Table

install ISR

i386 249

interrupt entries

as interrupt handlers

i386 249

M68k 243

MIPS 231

PowerPC 226

details 210

in active task 210

Post_Signal 210

interrupt handlers

Address_Error_Handler

MIPS 193

advantages 243

i386 249

Bus_Error_Handler

MIPS 193

definition

M68k 196

Div_By_Zero_Handler

MIPS 192

Enter_From_User

MIPS 191

Fp_Exception_Handler

MIPS 193

Fp_Restore_Handler

MIPS 191

Fp_Save_Init_Handler

MIPS 191

Fp_Unusable_HandlerMIPS 193

installed in IVT

MIPS 231

PowerPC 227

RH32 195

list

MIPS 190

Ntaken_Inst_Handler

MIPS 192

Overflow_Handler

MIPS 192

Range_Handler

MIPS 192

Stack_Overflow_Handler

MIPS 193

Taken_Inst_Handler

MIPS 192

Tdm_Handler

MIPS 191

interrupt handling

Ada priority ceiling 202

Interrupt_Handler generic

MIPS 190

protected object data 202

protected object environment 203

runtime environment 201

user configuration 203

interrupt latency

definition 222

definitionM68k 242

Enter_From_User 222

Isr_Complete 223

MIPS 230

Pending_Ring_Add 222

Restore_Context 222

interrupt levels

M68k 241

interrupt mask

i386 196

interrupt priority mask

M68k 241

ISRs

MIPS 229

interrupt priority

ISR lowering its own

i386 248

M68k 242

interrupt priority levels

i386 247

M68k 196

interrupt processing

exceptions

M68k 196

handler_table

runtime environment 202

internal exception 196

interrupt handler 196

interrupt priority level

M68k 196

Interrupt Service Routine 196

interrupt vector table

runtime environment 202

ISR 196

M68k 196

PowerPC 166

protected handler

runtime environment for interrupt handling 202

protected object data

runtime environment for interrupt handling 201

protected procedure

runtime environment 202

user configuration 203

wrapper 204

runtime environment 202

interrupt service routine

M68k 196

interrupt servicing

Complete_External

PowerPC 174

interrupt stack 154, 155

common 155

M68k 238

limit 239, 240, 246

shared 238

switching 238

interrupt stack switching

M68k 153

PowerPC 226

RH32 235

interrupt support

CPU usage model

MIPS I 185

external hardware interrupts

MIPS I 185

internal software interrupts

MIPS I 185

Interrupt Vector Table

install ISR

MIPS 231

PowerPC 226

PowerPC 170

RH32 195

signal Isr 210

interrupt vector table

runtime environment for interrupt handling 202

Interrupt_Handler 213

MIPS 190

interrupts

calculating worst case response 222

M68k 242

MIPS 230

definition

MIPS II 183

detect unexpected 243

i386 249

disable

i386 248

M68k 242

MIPS 230

environment for handling 201

i386

definition 197

exception processing 197

priority mask 196

processing 197

interrupt priority mask

RH32 234

interrupts off time

M68k 242

MIPS 230

processor interrupt mask

MIPS II 132

protection of critical regions 222

relation to exceptions

MIPS II 183

worst case stack usage 156

interrupts processing

PowerPC 179

I/O

memory mapped

MIPS 231

RH32 136

accessing ports 151

I/O channels

implementing 55

is

linker options keyword 16

ISR

application

RH32 196

board-specific interrupt priority levels 247

definition

M68k 196

detect unexpected interrupts

i386 249

example of signal ISR 210

functional overview 212

generic wrappers 213

high priority

i386 249

M68k 242

i386 197

privilege level 159

install in Exception Vector Table

M68k 243

install in Interrupt Descriptor Table

i386 249

install in Interrupt Vector Table

MIPS 231

PowerPC 226

interrupt mask

MIPS 229

kernel default

detect unexpected interrupts

M68k 243

linked with the kernel

i386 243, 249

M68k 236, 243

MIPS 231

PowerPC 226

lower priority 248

M68k 242

performance 214

primary wrappers 213, 214

priority 7 ISR 242

registers saved by wrapper 213

requirements

i386 244

M68k 237

MIPS 228

PowerPC 225

sharing data with the application 214

signal 210

signal ISR 210

steps performed

i386 244

M68k 237

MIPS 228

synchronize with tasks 215

v_i_sig.1.ada 210

VADSexec wrapper 214

Isr_Complete

i386 246

interrupt latency 223

M68k 241, 242

Isr_Enter

do not call

M68k 242

M68k 238

procedure

M68k 238

IVT

MIPS 189

RH32 195

K

kernel

Address_Error_Handler

MIPS 193

AdEL or AdES machine exception

MIPS 193

Bus_Error_Handler

MIPS 193

collision avoidance

MIPS II 147

collision avoidance on MIPS I 144

detect constant or range error

MIPS 192

Div_By_Zero_Handler

MIPS 192

divide by zero

MIPS 192

emulate instruction in branch delay

MIPS 192

Enter_From_User

MIPS 191

execute nonexistant coprocessor

MIPS 193

Fp_Exception_Handler

MIPS 193

Fp_Restore_Handler

MIPS 191

Fp_Save_Init_Handler

MIPS 191

Fp_Unusable_Handler

MIPS 193

FPC trap encountered

MIPS 193

i386

CPU usage model 158, 159

GDT entries 161

IDT 162

initialize 159

Page_Protection_Enabled 159, 160

privilege level 159

TSS 161

IBE or DBE machine exception

MIPS 193

initialize

MIPS I 127

MIPS II 132

ISR wrapper

M68k 236, 243

linker options keyword 19

MIPS I

CPU usage model 126

MIPS II

CPU usage model 131

Ntaken_Inst_Handler

MIPS 192

Overflow_Handler

MIPS 192

PowerPC

CPU usage model 117

Range_Handler

MIPS 192

RH32

CPU usage model 147

stack overflow

MIPS 193

Stack_Overflow_Handler

MIPS 193

stacks used 153

Taken_Inst_Handler

MIPS 192

tasking service requests

MIPS 191

translate machine arithmetic overflow exception

MIPS 192

Kernel ISR Wrapper

PowerPC 227, 232

kernel ISR wrapper

PowerPC 224

kernel stack 154

key 65

L

latency

interrupts off time

MIPS 230

levels

interrupt 241

limit

interrupt stack 239, 240, 246

link

detailed information 13

foreign object files 13

linking and executing overview 11

subsection 19

link map

Deleted Sections 29

how to read 29

options file 29

symbol information 32

Link_Block

link a kernel program 19

link_block_address 65

linker

exception group 24

linker description file 15

example 27

for clauses 24

format 16

group declaration 21

image groups 23

names 17

objects declaration 21

options declaration 18

ROM model 25

variable syntax 17

Void group 23

linker options

Include 14

linker options file

for use at 16

see linker description file

linker options keywords

align 16

at 16

define 18

end 16

entry 19

for 16

group 16

image 16

include 19

is 16

kernel 19

map 20

No_Optimize 20

objects 16

options 16

origin 20

use 16

LINKER_DESCRIPTION_FILE switch 11, 15

linking

multiple user programs 62

selective 14

VOX relocatable object file section tables 43

VOX relocatable object files 46

linking C++ programs with Ada 37

loading

multiple user programs 64

VOX executable object files 50

locate

group at memory address 24

group relative to another group 24

logical target 108

Long_Call

linker option 19

lower

ISR priority

i386 248

M

M68k

interrupt levels 241

parameter passing 152

register conventions 151

machine code

MIPS II

Implicit_Code(OFF) 140

precautions 140

precautions

PowerPC 182

RH32

Implicit_Code(OFF) 150

precautions 150

machine exception handling

mapping

MIPS I 188

MIPS I 187

RH32 195

Machine State Register

See also MSR.

Magic field values

VOX relocatable object file header 40

mailbox

VADSexec 215

map

linker options keyword 20

mapped i/o

RH32 196

mapping targets 109

mask

interrupt priority 241

master state 239

enabled 155, 158

Master_State_Enabled 239

memory

mapped I/O

MIPS I 141

RH32 151

RH32

management support 150

write buffer on MIPS 141

memory management

MIPS I 130

memory mapped I/O

access

MIPS 231

minimal disturbance debugger features 89

minimal disturbance debugging

APEX_RDT_TIMEOUT 98

configuration 97

realtime debug task(RDT) 97

runtime support 104

detach running application 99

disassembly 100

display data 100

environment variables 94

exceptions 99

options 94

passthru command 98

permitted commands 95

RDT priority 98

realtime debugging considerations 99

realtime mode 93

trouble shooting 102

RDT initialization time-out eror message 103

start-up time 102

MIPS I

byte ordering 127

c0_status 128

cache collision avoidance 142

cache collisions 142

cache performance 141

cache structure 142

caching overview 142

CP0 status register 128

CPU usage model 126

data cache collision avoidance 144

FPC support 127

improve cache performance 141

initialize kernel 127

kernel collision avoidance 144

memory management 130

memory mapped I/O 141

processor interrupt mask 128

MIPS II

byte ordering 131

C0_status 132

cache collisions 145

cache structure 144

caching overview 144

collision avoidance with kernel 147

CP0 status register 132

CPU usage model 131

data cache collision avoidance 147

floating point accelerator 132

FPC 132

improve cache performance 144

inititalize kernel 132

machine code precautions 140

processor interrupt mask 132

TLB 136

modes

M68k processor 153

Motorola AltiVec 120

MPC860 119

MSR

default settings on PowerPC 119

PowerPC 119, 166

multiple target debugging

catch exceptions 92

program file 90

program file options 89

synchronized targets considerations 91

synchronized targets hardware 91

multiple targets 110

multiple user programs 61

calling procedures 68

debugging 64

exiting 65

linking 62

loading 64

server program 71

sharing objects 66

starting 65

terminate 65

N

names

linker description file 17

section(s) 21

nested interrupts 156

component is supervisor stack size 156

M68k 238

new physical target dialog 111

next_id

MIPS 189

No_Optimize

linker options keyword 20

Ntaken_Inst_Handler

MIPS 192

O

object file formats 39

object files

include additional in link 21

link foreign object files 13

partitions 21

sections 21

objects

linker options keyword 16

share in multiple user programs 66

objects declaration

linker description file 21

options

linker keywords 18

linker options keyword 16

minimal disturbance debugging 94

options declaration

linker description file 18

origin

linker options keyword 20

Overflow_Handler

MIPS 192

override

symbol definition 18

overview

multiple user programs 61

target control 107

P

packages

V_Interrupts

M68k wrapper routines 236, 243

wrapper routines 213

Page_Protection_Enabled

i386 kernel 159, 160

parameter passing

M68k 152

parameter passing conventions

PowerPC software floating point 120

pass command 86

passthru command

minimal disturbance debugging 98

PDR (Procedure Descriptor Record) table 44

Pending_Ring_Add

interrupt latency 222

physical target 107

physical target storage 108

place

program into ROM 25

Post_Signal 210

PowerPC

byte ordering 119

chaining ISR routines 174

context record 175

CPU usage model 117

decoding external interrupts 180

Default_Trap 181

Enter_From_User 181

execution exceptions processing 180

external interrupts processing 179

floating point exceptions 182

floating point unit 119

interrupt processing

PowerPC 166

interrupt stack switching 226

Interrupt_Vector_Table 170

ISR requirements 225

kernel ISR wrapper 224, 227, 232

MSR 119

MSR default settings 119

program exceptions 177

reset external interrupt 181

software floating point 119

software floating point parameter passing 120

TDM and Excpetion Vector Table 177

V_Exception_Handler 176

pragmas

Implicit_Code(OFF)

MIPS II 140

precautions

machine code

PowerPC 182

priority

lower ISR

i386 248

M68k 242

priority 7 ISR

M68k 242

privilege level

i386 ISR 159

i386 kernel 159

privilege statesM68k 153

procedure

Debug_Block

M68k 238

Enter_Isr

M68k 238

Float_Wrapper 214

Procedure Descriptor Record (PDR) table 44

procedures

call in other programs 68

Fast_Isr 213

Float_Wrapper 213

ISR 213

process_interrupt

MIPS 190

processing

exception and interrupt

PowerPC 166

processor interrupt mask

MIPS I 128

MIPS II 132

processor modes

M68k 153

program

download 11

execute 11

how to lay out in memory 21

program exceptions

PowerPC 177

program file

multiple program debugging 90

program file option

multiple target debugging 89

programming the AltiVec 121

programs

multiple user 61

protect

critical regions 222

protected handler array

runtime environment for interrupt handling 202

protected object data

runtime environment for interrupt handling 201, 202

protected object environment 203

protected procedure

runtime

runtime environment for interrupt handling 202

provide

RAM copy of a ROM group 23

R

R4000

FPC MIPS II 132

RAM

provide RAM copy of ROM group 23

Range_Handler

MIPS 192

RDT

minimal disturbance debugging 97

RDT initialization time-out error message

minimal disturbance debugging 103

read

link map 29

realtime debug task

See also RDT

realtime debug task (RDT)

minimal disturbance debugging 97

realtime debug task priority

increase in minimal disturbance debugging 98

realtime debugging considerations 99

realtime mode

minimal disturbance debugging 93

register conventions

M68k 151

registers

i386

CR0 160

debug registers 161

EFLAGS 160

MIPS I CP0 status register 128

MIPS II CPO status register 132

RH32

status register 148

saved by ISR wrapper 213

relocation

VOX relocatable object files 46

relocation record

VOX relocatable object files 47

remove

unreferenced object file sections 20

request

link map 20

requirements

ISR

i386 244

M68k 237

MIPS 228

RH32 233

reset external interrupt 181

restore

floating point context

MIPS 191

Restore_Context

interrupt latency 222

RH32

accessing I/O ports 151

application ISRs 196

CPU status register 148

CPU usage model 147

floating point trap handlers 150

FPC 148

Implicit_Code(OFF) 150

initialize CPU 148

I/O ports 136

machine code precautions 150

memory management 150

ROM

sample options file 27

ROM model 25

runtime

environment for interrupt handling 201

runtime support configuration

minimal disturbance 100

minimal disturbance debugging 104

runtime system

multiple user programs 61

S

save

floating point context

MIPS 191

section

ways to name 21

section tables

VOX relocatable object files 43

sections

deleted by selective linking 29

object file 21

selective linking 14

advantages 14

Deleted Sections. 29

Include option 14

subsections 14

VOX reloctable object file section tables 43

send

commands to target controlling agent 86

server program

multiple user programs 71

share

interrupt

MIPS 189

objects between programs 66

signal interrupt entry 209

signal ISR 210

Create_Signal 210

example 210

software floating point

PowerPC 119

PowerPC paramter passing conventions 120

specify

starting symbol name 19

SR register 241

stack configurationsM68k 154

stack limit checking 214

stack switching

interrupt

PowerPC 226

interrupts

MIPS 230

Stack_Overflow_Handler

MIPS 193

starting

multiple user programs 65

starting symbol of executable image 19

start-up time

minimal disturbance debugging 102

states

supervisor tasks, master state not enabled 157

user tasks, master state enabled 157

user tasks, master state not enabled 155

status

supervisor tasks, master state enabled 158

status register 153

CP0

MIPS I 128

MIPS II 132

RH32 148

steps

Isr and Fast_Isr

i386 244

M68k 237

MIPS 228

storage

physical targets 108

string size

VOX relocatable object file sections 43

string table

do not include in executable 20

strings

VOX relocatable object file sections 43

supervisor mode 239

supervisor stack

M68k 155, 238

Supervisor_Tasks_Enabled

M68k 154, 155, 239

suppress

removal of unreferenced sections 20

switches

LINKER_DESCRIPTION_FILE 11, 15

variable syntax in linker description file 17

switching interrupt stacks 238

symbol

absolute 18

symbol information

link map 32

symbol map

generate 20

symbol table

do not include in executable 20

VOX relocatable object file sections 43

VOX relocatable object files 45

synchronize

ISRs and tasks 215

synchronized targets considerations

multiple target debugging 91

synchronized targets hardware

multiple target debugging 91

T

Taken_Inst_Handler

MIPS 192

target control 107

target control customization 110, 115

target control overview 107

target controlling agent 86

Target field values

VOX relocatable object file header 40

task

stack configurationsM68k 154

synchronize with ISRs 215

task supervisor stack

M68k 154

task user stack

M68k 154

TDM

getting started 9

Interrupt_Handler

MIPS 190

ISR wrapper

M68k 236, 243

Tdm_Handler

MIPS 191

TDM and Exception Vector Table

PowerPC 177

Tdm_Handler

MIPS 191

terminate

multiple user programs 65

terminate_callout 66

Text

VOX relocatable object file sections 43

Text relocation

VOX relocatable object file sections 43

Text_Group

place into ROM 25

TLB

MIPS II 136

tools target dialog 111

Translation Lookaside Buffer

See also TLB.

trap

definition

MIPS II 183

RH32 194

floating-point handlers

MIPS II 186

RH32 195

relation to exceptions

MIPS II 183

traps

definition

MIPS II 183

relation to exceptions

MIPS II 183

RH32

floating point trap handlers 150

troubleshooting

minimal disturbance debugging 102

minimal target debugging 100

TSS

i386 161

U

unit

locate in memory using link map 29

use

linker options keyword 16

user configuration

interrupt handling 203

interrupt processing 203

V

V_Exception_Handler

PowerPC 176

V_Gen_Except

MIPS 228

MIPS I 186

v_i_sig.1.ada

ISR header 210

V_Signal_Isr 210

VADSexec

critical regions

i386 248

M68k 242

MIPS 230

RH32 234

mailbox 215

stacks used by kernel and tasks 153

VADSexec wrapper

Fast_Isr 214

Float_Wrapper 214

ISR 214

variable syntax

linker description file 17

Void group

linker description file 23

VOX executable object files

format 49

header 49

group images 50

group table 50

loading 50

VOX file layout illustration 49

VOX object archive files

archive identification string 52

format 51

format illustration 51

object file library 53

VOX object file formats 39

VOX relocatable Object files

format

layout illustration 42

VOX relocatable object files

format 39

header 39

Endian field values 41

Magic field values 40

Target field values 40

procedure descriptor table 44

relocation and linking 46

relocation record 47

section tables 43

selective linking 43

sections

Const 43

Data 43

Data relocation 43

string size 43

strings 43

symbol table 43

Text 43

Text relocation 43

symbol table 45

W

widget services 71

working view

create for application 5

wrapper

runtime environment for interrupt handling 202

user configuration for interrupt processing 204

write buffer

MIPS 141