Thunder (7985) SIT-R CPLD Code Update 09/01/06 IO CPLD Revision: 0x23 HDT CPLD Revision: 0x23 CONTENTS --------- 1.0 Overview 2.0 Change History 3.0 Update Instructions 4.0 Hardware Checkpoints 5.0 Jumpers and LED's 6.0 Unattended Mode 1.0 Overview -------------- 1.1 Dependencies Hardware: IO Planar: pass 4 (SIT-R, non-HT2100 A1) BIOS: n/a BMC: n/a 1.2 Defects Addressed n/a 1.3 Changes In This Release - fix PCI-X riser SERR/PERR reporting via I2C 0x68 2.0 Change History -------------------- 0x22 - initiate sync flood via HT1000 upon HT1000 PCI-X or PCI PERR 0x21 - removed PCI/E/X resets on sync flood to aid in error reporting; J25 now has opposite effect - will force PCI/E/X resets on sync flood - simulate "power button" pulse to BMC if SIO initiates power on with ONCTL# by itself (e.g. RTC wake) - setting 0x4c5[4]=0 will now generate SMI (via HT1000 GEVENT0) ~100ms after writing bit - value of port 80 at the time of a reset button event or BMC generated reset event (including after sync flood) will now be captured in 0x4cc; value will remain until an AC power cycle or 0x4cc[0] is reset to '0' - setting 0x4c9[7]=0 will now blink CPLD debug LEDs for mfg test 0x20 - REMOVED HT2100 A1 bug work arounds 0x12 - HT2100 A1 bug work arounds: force reboot if checkpoint '6.6' hang (no first fetch), checkpoint '00' hang (no first checkpoint), or BIOS checkpoint '42' hang - I2C 0x64[5] now indicates PS_PWRGD fault; generates I2C interrupt - 0x4c4[7] now accepts writes; BIOS can disable WOL bypass by writing 0x4c4[7]=0, similar to installing jumper J33 - widened pulse on NIO_PME_L and SLOT_GPE_L to overcome SIO's internal debounce circuit which is enabled by default - no longer generate SMIs on ALERT# from CPLD - allow multiple 'A:x' on checkpoint display - I2C 0x60[3:2] now clear-on-read to allow multiple ALERT# events - changed polarity of 0x4c3[6] for backwards compatibility - BMC_CPLD_LINK0 signal to BMC now goes low upon a VRD, CPU THERMTRIP, or power supply fault - J25 now blocks reset of PCI devices upon fatal error for debug purposes - FLASH_XA2x signals now driven low when in standby to reduce leakage current 0x11 - no longer removing power from ethernet chips on DC off to reload defaults; solves BMC ethernet connection issues - added onboard video disable to port 0x4c3[7] - changed post-sync flood error handling to new scheme - increased power-on delay after AC power failure to allow BMC time to initialize - on sync flood, checkpoint display will now alternate between 'F:0' and the last BIOS checkpoint - added J21 to force HDT path to HDT connectors rather than the BMC for debug after sync flood - preset BMC system power-on prevent checkpoint to '62' instead of '00' - reading IO I2C register 0x6c now returns BIOS port 80; writes still BMC power on prevent checkpoints 0x10 Initial SDV Release 3.0 Update Instructions ----------------------------------------- ***** AFTER UPDATE, AC POWER CORD(S) MUST BE ***** ***** UNPLUGGED FOR 30 SECONDS ***** 1) Create bootable diskette from c2cpld23.img file or bootable CD from c2cpld23.iso file. 2) Insert media into system to be updated and boot from that media. 3) Confirm CPLD update at prompt. Upon successful completion, remove AC power for 30 seconds. Code updates will not take effect until AC power is cycled. Note: *.pof files are included on media in case programming via cable becomes necessary. ***** AFTER UPDATE, AC POWER CORD(S) MUST BE ***** ***** UNPLUGGED FOR 30 SECONDS ***** 4.0 Hardware Checkpoints -------------------------- Thunder Hardware Checkpoints 1.x power faults 1.1 epow 1.2 ps_pwrgd 1.3 backplane_fault 1.4 cpu_vrm_sfault_n 1.5 overcurrent_n 3.x io vrm faults 3.2 5v_vrm 3.3 3_3v_vrm 3.4 2_5v_video 3.5 1_8v_video 3.6 2_1v_sas 3.7 1_8v_sas 3.8 1_4v_sas 3.9 2_5v_bcm 3.a 1_2v_2100 3.b 1_2v_1000 3.d bridge_core 3.e sec_vrm 3.c io_pwrgood 4.x & 5.x cpu vrm faults & status 4.2 cpu2_vtt 4.3 cpu1_vtt 4.6 cpu2_vddio 4.7 cpu1_vddio 4.a cpu2_vdda 4.b cpu1_vdda 4.e cpu2_vcore 4.f cpu1_vcore 5.0 vldt 5.1 cpu_pwrgood 5.4 cpu2_thermtrip 5.5 cpu1_thermtrip 5.6 cpu_pop_err 6.x system control 6.1 on_ctl_n 6.2 bmc_pwron 6.3 pwrok 6.4 sys_reset_n 6.5 pci_reset 6.6 lpc_check Thunder System Error Checkpoints F:0 fatal error/sync flood detected by HT2100 F:1 fatal error/sync flood detected by riser HT2100 A:0 non-fatal error (ALERT#) detected by HT2100 A:1 non-fatal error (ALERT#) detected by riser HT2100 S:2 SERR on riser PCI-X bus P:2 PERR on riser PCI-X bus S:1 SERR on PCI-X bus P:1 PERR on PCI-X bus S:0 SERR on PCI bus P:0 PERR on PCI bus 5.0 Jumpers and LED's ----------------------- 5.1 Jumpers J20 make all system resets "warm" J21 force HDT path to HDT connectors on sync flood (not BMC) J25 force PCI resets on fatal error J26 external system reset input 5.2 LED's CR21 global VRD or THERMTRIP fault CR22 power backplane power good CR23 n/a CR24 HT2100 ALERT CR25 HT2100 FATAL 5.0 Unattended Mode --------------------- To use the diskette in unattended mode, change the following line in autoexec.bat cpldprog.exe thund_xx.jbc to cpldprog.exe -u thund_xx.jbc